1/4 rev. a structure silicon monolithic integrated circuit product name audio interface + video driver lsi type BU7636MWV applications dvc, dsc, etc. functions audio part ?stereo 16 bit ?? ?3-input stereo selector ?stereo microphone amplifier with alc function ?stereo line amplifier ?btl output speaker amplifier 300mw@8? ?64-step electronic volume with alc function ?master clock256fs/384fs/512fs/1024fs ?sampling rate8khz48hz ?three-line serial interface power on reset function ?audio if format msb first2 ? s adc 16bit word lengths left justifiedi 2 s dac 16bit word lengths left, right justified, i 2 s video part ?sync-tip-clamp, 6th lpf, y/ c/v output video driver ?output coupling condenser unnecessary ?aspect ratio identification signal output absolute maximum ratings ta=25 parameter symbol limits unit comment supply voltage lvdd1 -0.34.5 avdddvddspvddvvdd lvdd2 -0.34.5 v cpvdd hvdd -0.36.0 v vvdd_sdc input voltage vin -0.3 supply voltage + 0.3 keep each limit s upon storage temperature range tstg -50125 operating temperature range tope -2085 power dissipation *1 pd 800 in the case of use at ta=25 or more, 8.0mw should be reduce d per 1. t=1.6mm, 74.2mm x 74.2mm, 1-laye r board, cu surface radiate fo il 0mm 2 radiation resistance de sign is not arranged. operating conditions ta=25 parameter symbol limits unit comment supply voltage lvdd1 2.73. 6 avdddvddspvddvvdd lvdd2 2.73.4 v cpvdd hvdd 4.55.5 v vvdd_sdc note avdddvddspvddvvdd are not needed to be same voltage . note please do not set sp vdd lower than avdd-0.3v.
2/4 rev. a electrical characteristics unless specified, ta=25avdd=sp vdd=dvdd=vvdd=cpvdd= 3.3vvvdd _sdc=5.0vavss=spvss=dvss=vvss= 0vb.w.=22hz22khzfs=48khzfin=1khz parameter symbol limits unit condition min. typ. max. < current consumption > #mclk=24mhz power-down mode idds - 0.03 0.1 #pwap=0 rec mode iddr - 8.5 16 #mdrec=1 play mode iddp - 7.5 16 #mdpb=mdsp= 1 video mode iddv - 33 80 #pwvd=pwcp=1 <> output voltage voreg 0.75avdd- 0.2 0.75avdd 0.75avdd+ 0.2 2.2k load input voltage vil dvss 0.3dvdd v input voltage vih 0.7dvdd dvdd v input current iil -10 10 a output voltage vol 0 0.5 v iol=-1ma output voltage voh dvdd-0.5 dvdd v iol=1ma #alc1=o ff, mic gain 22db (mgain=42db, mlim=-20db) input impedance zin 70 100 130 k input level vin -26 -24 -22 dbv dout=0dbfs l/r gain mismatch gv -1. 0 0 +1.0 db dout=0dbfs distortion thd+n 62 70 - db dout=-6dbfs@1khz snr 79 84 - db b.w.=jis-a l/r separation sepr 79 100 - db dout=-6dbfs@1khz ? output level doalc - -6 - dbfs alc1=on #lgain=+5db output level vo -5.5 -4.0 -2.5 dbv din=-6dbfs l/r gain mismatch gv -1.0 0 +1.0 db din=-6dbfs distortion thd+n 70 80 - db din=-6dbfs@1khz snr 82 90 - db b.w.=jis-a l/r separation sepr 80 100 - db din=-6dbfs@1khz #alc2=off, evr=-6db, rl=8 output level vo 1.0 3.0 5.0 dbv din=0dbfs distortion thd+n 50 60 - db din=0dbfs@1khz snr 76 83 - db b.w.=jis-a ? output level voalc 1.0 3.0 5.0 dbv alc2=on, evr=8db < video path yinyout, vout(cincout, vout)> voltage gain gv +5.5 +6.0 +6.5 db vin=100khz, 1.0vpp maximum output level vom 2 .2 2.6 - vpp f=10khz, thd=1% frequency characteristic 1 gf 1 -3.0 0 - db f=6mhz/100khz frequency characteristic 1 gf2 - -27 -18 db f=18mhz/100khz differential gain dg - 1.0 3.0 % vin=1.0vpp standard stair step signal differential phase dp - 1.0 3.0 deg vin=1.0vpp standard stair step signal y signal output s/n sny +50 +65 - db band 100k6mhz terminal impedance 150 100% white video signal s-dc output voltage l v sdcl - 0.1 0.5 v rl=10k+100k m v sdcm 1.8 2.1 2.4 v rl=10k+100k h v sdch 4.0 4.6 - v rl=10k+100k (note input level of rec and output level of pb are relative t o avdd. (note) v sdcm v sdch is relative to vvdd_sdc.
3/4 rev. a serial interface control commands are entered on t he csb, sclk, and sdata pins, using 3 line 16 bit seri al input (msb first). the input cycle is started on t he csb falling edge, and each bi t of data is read in on the sclk rising edge. the data is loaded to regist er on the csb rising edge. register map note do not write to the a ddress except for the above. pin functional descriptions address register d7 d6 d5 d4 d3 d2 d1 d0 00h power control 0 pwsv pwap pwmrg pwvd pwcp 0 pwdrg 01h power control 0 comenb 0 0 mdsp mdpb mdrec 0 03h gain control 1 0 ada 0 0 lgain mgain1 mgain0 04h gain control slmin1 slmin0 0 0 musp mubsp mulo mudvl 05h clock control fmck1 fmck0 0 1 0 dif2 dif1 dif0 06h clock control 0 0 0 0 sfs1 sfs0 div1 div0 07h clock control 0 bfpd 0 dlen 0 0 0 0 08h alc control 0 mdalc1 mdevr1 mdevr0 0 0 0 mddvl 09h alc control atmc1 atmc0 rcmc1 rcmc0 atsp1 atsp0 rcsp1 rcsp0 0ah alc control rc2mc1 rc2mc0 0 0 rclm 0 0 0 0bh time control rini2 rini1 rini0 pini1 pini0 0 0 evrt 0ch volume control 0 mlim6 mlim5 mlim4 mlim3 mlim2 mlim1 mlim0 0dh filter control 0 0 dem1 dem0 hpfr3 hpfr2 hpfr1 hpfr0 0eh volume control dvol7 dvol6 dvol5 dvol4 dvol3 dvol2 dvol1 dvol0 0fh volume control 0 0 evr5 evr4 evr3 evr2 evr1 evr0 10h volume control 0 0 spvol1 spvol0 0 bvol2 bvol1 bvol0 12h fade control 0 0 0 0 dvlsk dvlt2 dvlt1 dvlt0 13h video control 1 1 1 sdc1 sdc2 0 0 0 no pin name function 1 cpvdd charge pump power supply 2 c4 flying condenser terminal 4 3 c3 flying condenser terminal 3 4 c2 flying condenser terminal 2 5 vvee video negative power supply 6 cin chroma signal input 7 vvss video ground 8 yin luminance signal input 9 vvdd video power supply 10 yout luminance signal output 11 vout composite signal outut 12 cout chroma signal output 13 sdcout sdc signal output 14 vvdd_sdc sdc power supply 15 dvdd digital power supply 16 dain codec da serial data input 17 adout codec ad serial data output 18 bclk codec bit clock in/output 19 lrclk codec lr clock in/output 20 mclk codec master clock input 21 dvss digital ground 22 sdata 3-wire serial data input no pin name function 23 sclk 3-wire serial clock input 24 csb 3-wire chip select input 25 micinr3 micrch input 3 26 micinr2 micrch input 2 27 micinr1 micrch input 1 28 mreg mic power supply 29 micinl1 miclch input 1 30 micinl2 miclch input 2 31 micinl3 miclch input 3 32 bias bias 1/2avdd 33 avss analog ground 34 avdd analog power supply 35 lineoutr line output 36 lineoutl line output 37 evrout evr output 38 spin sp input 39 spneg sp negative output 40 spvss sp ground 41 spvdd sp power supply 42 sppos sp positive output 43 beepin beep input 44 c1 flying condenser terminal 1 ? x ? ? x ? sdata 1 sclk csb 0 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 register address : a5 - a0 control data : d7 - d0
4/4 rev. a block diagram?external dimensions figure 1 block diagram figure 2 external dimensionunit ? spneg sppos micinl2 micinl1 lineoutr lineoutl spvdd spvss dvdd dvss mclk lrclk bclk adout dain charge pump c1 c2 c3 c4 vvee micinr2 micinr1 control digital filters avdd avss csb sclk evr adc dac audio interface alc2 bias sdata mreg cpvdd evrout spin bias sdc yout vout cout vvdd_sdc cin yin vvdd vvss clamp lpf lpf sdc_out micinl3 micinr3 alc1 alc1 beepin caution about absolute maximum rating when the absolute maximum rating such as the applied voltage an d the ranges of the operating temperature is exceeded, lsi might be destroyed. please apply neither volta ge nor the temperature that exceeds the absolute maximum rating. please execute physical measures for s afety such as fuse when it is thought to exceed the absolute maximum rating, and examine it so that the condition to exceed the absolute maximum rating is not a pplied to lsi. about gnd voltage in any state of operation must be the lowest voltage about the voltage of the terminal gnd. please actually confirm the voltag e of each terminal is not a voltage that is lower than the terminal gnd including excessi ve phenomenon. about design of overheating malfunction preventive circuit please design overheating malfunction preventive circuit with an enough margin in consideration of a permissible loss in the state of using actually. about the short between terminals and the mounting by mistake please note the direction and the gap of position of lsi enough about lsi when you mount on the substrate. lsi might be destro yed when mounting by mistake and energizing. moreover, lsi might be destroyed when s hort-circuited by entering of the foreign substances between th e terminal and gnd, between terminals, between the terminal and the power supply of lsi. about operation in strong electromagnetic field use in strong electromagnetic field has the possibility of ma lfunctioning and evaluate it enough, please. please note not to be beyond the package permissible range , when spvdd is set. about charge pump for prevent the undetermined state of charge pump, recommend t o put together cpvdd and dvdd pins. and to avoid the ics broken or smoke, you must not supply the external voltage or current to c1, c2, c3, c4, and vee pins. bu7636 lot no. pkguqfn044v6060 drawing no.ex475-6002
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